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PAN301A
PAN301A CMOS HIGH PERFORMANCE OPTICAL MOUSE SENSOR General Description
The PAN301A is a high performance CMOS process optical mouse sensor with DSP integration chip that serves as a non-mechanical motion estimation engine for implementing a computer mouse.
Features
Single 5.0 volt power supply Precise optical motion estimation technology Complete 2-D motion sensor No mechanical parts
Key Specification Power Supply Optical Lens Wide operating supply range 4.5V~5.5V 1:1
Accurate motion estimation over a wide range of System Clock 18.432 MHz surfaces High speed motion detection up to 37 inches/sec Speed and acceleration can be up to 20g Acceleration High resolution up to 800cpi Power down pin and register setting for low Resolution power dissipation. Power saving mode during times of no movement Frame Rate Serial Interface for programming and data transfer Operating Current I/O pin 5.0 volt tolerance Package 37 inches/sec 20g 400/600/800cpi 3000 frames/sec 12mA @Mouse moving (Normal) 5mA @Mouse not moving (sleep1) 100uA @Power down mode Shrunk DIP20
Ordering Information Order number PAN301ASI-204 PAN301ASI-208 I/O CMOS output CMOS output Resolution 400 cpi 800 cpi
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1. Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name VSS_LED LED OSCOUT OSCIN NC VSS VSS VDD VREFA VREFB YA YB XA XB NC NC NC SCLK SDIO PD Type GND I/O OUT IN GND GND PWR BYPASS BYPASS OUT OUT OUT OUT IN I/O IN Definition LED ground LED control Resonator output Resonator input No connection Chip ground Chip ground Chip power, 5V power supply Analog voltage reference Analog voltage reference YA quadrature output YB quadrature output XA quadrature output XB quadrature output No connection No connection No connection Serial interface clock Serial interface bi-direction data Power down pin, active high
1
20
LB
RB
+Y
1
20
10
11
10
11
+X
Figure 1. Top view pinout Figure 2. Top view of mouse
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2. Block Diagram and Operation
LED VSS_LED LED DRIVE POWER ON RESET VOLTAGE REGULATOR AND POWER CONTROL CMOS IMAGE SENSOR QUADRATURE OUTPUT QUADRATURE OUTPUTS XA XB YA YB
VDD VSS VSS
5V POWER
PD
DIGITAL SIGNAL PROCESSOR
VREFA VOLTAGE REFERENCE VREFB
SERIAL INTERFACE
SCLK SDIO
SERIAL INTERFACE
CONTROL REGISTER
OSCILLATOR
OSCIN OSCOUT
RESONATOR
Figure 3. Block diagram The PAN301A is a high performance CMOS-process optical mouse sensor with DSP integration chip that serves as a non-mechanical motion estimation engine for implementing a computer mouse. It is based on new optical navigation technology, which measures changes in position by optically acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of movement. The sensor is in a 20pin optical package. The output format is two-channel quadrature (X and Y direction), which emulates encoder phototransistors. The current X and Y information are also available in registers accessed via a serial port.
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3. Registers and Operation
The PAN301A can be programmed through registers, via the serial port, and DSP configuration and motion data can be read from these registers. All registers not listed are reserved, and should never be written by firmware.
3.1 Registers
Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 Name Product_ID Product_ID Motion_Status Delta_X Delta_Y Operation_Mode Configuration R/W R R R R R R/W R/W Default 0x30 0x1N Data Type Eight bits [11:4] number with the product identifier Four bits [3:0] number with the product identifier Bit field Eight bits 2's complement number Eight bits 2's complement number Bit field Bit field
3.2 Register Descriptions
0x00 Bit Field Usage 0x01 Bit Field Usage 7 6 PID[3:0] 5 7 6 5 Product_ID 4 PID[11:4] The value in this register can't change. It can be used to verify that the serial communications link is OK. Product_ID 4 3 2 1 0 Reserved [3:0] 3 2 1 0
The value in this register can't change. It can be used to verify that the serial communications link is OK.
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0x02 Bit Field Usage 7 Motion 6 5 Reserved[6:5] Motion_Status 4 DYOVF 3 DXOVF 2 RES[2:1] 1 0 Reserved
CMOS Optical Mouse Sensor
Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If so, then the user should read registers 0x03 and 0x04 to get the accumulated motion. It also tells if the motion buffers have overflowed since the last reading. The current resolution is also shown. Reading this register freezes the Delta_X and Delta_Y register values. Read this register before reading the Delta_X and Delta_Y registers. If Delta_X and Delta_Y are not read before the motion register is read a second time, the data in Delta_X and Delta_Y will be lost.
Notes
Field Name
Description Motion since last report or PD 0 = No motion (Default) 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers
Motion
Reserved[6:5] DYOVF
Reserved for future Motion Delta Y overflow, Y buffer has overflowed since last report 0 = No overflow (Default) 1 = Overflow has occurred Motion Delta X overflow, X buffer has overflowed since last report
DXOVF
0 = No overflow (Default) 1 = Overflow has occurred Resolution in counts per inch 0 = 800 (Default @ PAN301ASI-208) 1 = 400 (Default @ PAN301ASI-204) 2 = 600
RES[2:1]
Reserved 0x03 Bit Field Usage 0x04 Bit Field Usage 7 Y7 7 X7
Reserved for future Delta_X 6 X6 5 X5 4 X4 3 X3 2 X2 1 X1 0 X0
X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. Report range -128~+127. Delta_Y 6 Y6 5 Y5 4 Y4 3 Y3 2 Y2 1 Y1 0 Y0
Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. Report range -128~+127.
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0x05 Bit Field Usage 7 6 5 Operation_Mode 4 3 2 1 0 LEDsht_enh XY_enh Reserved Slp_enh Slp2au Slp2mu Slp1mu Wakeup Register 0x05 allows the user to change the operation of the sensor. Shown below are the bits, their default values, and optional values. Operation_Mode[4:0] "0xxxx"=Disable sleep mode "10xxx"=Enable sleep mode1 "11xxx"=Enable sleep mode2 "1x100"=Force enter sleep23 "1x010"=Force enter sleep13 "1x001"=Force wakeup from sleep mode3 Notes: 1. Enable sleep mode, but disable automatic entering sleep2 mode, that is, only 2 modes will be used, normal mode and sleep1 mode. After 1 sec not moving during normal mode, the chip will enter sleep1 mode, and keep on sleep1 mode until moving is detected or wakeup is asserted. 2. Enable sleep mode full function, that is 3 modes will be used, normal mode, sleep1 mode and sleep2 mode. After 1 sec not moving during normal mode, chip will enter sleep1 mode, and keep on sleep1 mode until moving is detected or wakeup is asserted. And after 60 sec not moving during sleep1 mode, the chip will enter sleep2 mode, and keep on sleep2 mode until detect moving or force wakeup to normal mode. Mode Sampling rate @3000frame/sec Active duty cycle @3000frame/sec Sleep1 94/sec 22% Sleep2 3/sec 2.24% 3. Only one of these three bits slp2mu_enh, slp1mu_enh, and wakeup can be set to 1 at the same time, others have to be set to 0. After a period of time, the bits, which was set to 1, will be reset to 0 by internal signal. Notes Field Name LEDsht_enh XY_enh Reserved Slp_enh Slp2au Slp2mu Slp1mu Wakeup Description LED shutter enable / disable 0 = Disable 1 = Enable (Default) XY quadrature output enable/disable 0 = Disable 1 = Enable (Default) Reserved for future Sleep mode enable/disable 0 = Disable 1 = Enable (Default) Automatic enter sleep2 mode enable/disable 0 = Disable (Default) 1 = Enable Manual enter sleep2 mode, set "1" will enter sleep2 and this bit will be reset to "0" Manual enter sleep1 mode, set "1" will enter sleep2 and this bit will be reset to "0" Manual wake up from sleep mode, set "1" will enter wakeup and this bit will be reset to "0" 6 V1.3, MAY. 2004
CMOS Optical Mouse Sensor
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0x06 Bit Field Usage Notes 7 6 5 Reserved[7:4] Configuration 4 3 PD 2 RES[2:1] 1 0 Reserved
CMOS Optical Mouse Sensor
The Configuration register allows the user to change the configuration of the sensor. Shown below are the bits, their default values, and optional values. Field Name Reserved[7:4] Description Reserved for future Power down mode PD 0 = Normal operation (Default) 1 = Power down mode Output resolution setting RES[2:1] 0 = 800 (Default @ PAN301ASI-208) 1 = 400 (Default @ PAN301ASI-204) 2 = 600 Reserved Reserved for future
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4. Specifications
Absolute Maximum Ratings Symbol TSTG TA Parameter Storage temperature Operating Temperature Lead Solder Temp VDD ESD VIN DC input voltage -0.5 DC supply voltage -0.5 Min -40 -15 Max 85 55 260 5.5 2 5.5 Unit C C V kV V All pins, human body model MIL 883 Method 3015 PD, SDIO, SCLK, XA, XB, YA, YB,VDD For 10 seconds, 1.6mm below seating plane. Notes
Recommend Operating Condition Symbol TA VDD VN FCLK FR SCLK Z S A R Parameter Operating Temperature Power supply voltage Supply noise Clock Frequency Frame Rate Serial Port Clock Frequency Distance from lens reference plane to surface Speed Acceleration Resolution 400 2.3 0 2.4 18 18.432 3000 Min. 0 4.5 5.0 Typ. Max. 40 5.5 100 24.576 4000 10 2.5 37 20 800 Unit C V mV MHz Peak to peak within 0-100 MHz Set by ceramic resonator Notes
Frames/s 4000Frames/s @ FCLK=24.567MHz MHz mm Inches/sec g cpi Refer to Figure 4.
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Package Lid Lens
Z OBJECT SURFACE
Figure 4. Distance from Lens Reference Plane to Surface
+X +Y
ESD LENS RING
BASE PLATE
PLASTIC SPRING
CLIP
LED
SURFACE IS 0 REF. PCB SENSOR BASE PLATE ALIGNMENT POST
Unit: mm
Figure 5. 2D assembly
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AC Operating Condition Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD =5.0 V Symbol tPD tPDW tPDR Parameter Power Down PD Pulse Width PD Pulse Register 700 333 Min. Typ. Max. Unit Notes 500 us us us From PD. (Refer to Figure 15) Pulse width to reset the serial interface. (Refer to Figure 15) One frame time maximum after setting bit 2 in the Configuration register @3000frame/sec. (Refer to Figure 17)
CMOS Optical Mouse Sensor
tPUPD
Power Up from PD
8
30.5
From PD to valid quad signals. After tPUPD, all registers contain valid data from first image after PD. Note that an additional 90 ms frames for Auto-Exposure (AE) stabilization may be required if mouse movement occurred while PD was high. (Refer to Figure 15) ms us us From VDD to valid quad signals. 500usec + 90frames. Minimum hold time for valid data. (Refer to Figure 11) @3000frame/sec (Refer to Figure 14)
tPU tHOLD tRESYNC tSIWTT tr,tf tr,tf tr,tf
Power Up from VDD SDIO read hold time Serial Interface RESYNC. Serial Interface Watchdog Timer Timeout Rise and Fall Times: SDIO Rise and Fall Times: XA, XB, YA, YB Rise and Fall Times: ILED
8 3 1 1.7 25, 20 25, 20 10, 10
30.5
ms @3000frame/sec (Refer to Figure 14) ns ns ns CL = 30pf CL = 30pf LED bin grade: R; R1=100ohm
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DC Electrical Characteristics Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD =5.0 V Symbol Parameter Type: PWR IDD IDD IDDPD Supply Current Mouse moving (Normal) Supply Current Mouse not moving (sleep1) Supply Current (Power Down) Input voltage HIGH Input voltage LOW Output voltage HIGH Output voltage LOW Input voltage HIGH Input voltage LOW Output voltage LOW Output voltage HIGH Output voltage LOW 2.4 0.6 2.0 0.7 150 2.4 0.6 2.0 0.7 V V V V V @I OH = 2mA (SDIO only) @I OL = 2mA (SDIO only) When driving from an external source When driving from an external source 12 5 100 mA XA, XB, YA, YB, SCLK, SDIO = no load mA uA PD, SCLK, SDIO = high Min. Typ. Max. Unit Notes
Type: SCLK, SDIO, PD VIH VIL VOH VOL VIH VIL VOL VOH VOL
Type: OSCIN
Type: LED mV @I OL = 25mA V V @I OH = 2mA @I OL = 2mA Type: XA, XB, YA, YB
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5. Quadrature Mode
The quadrature state of the PAN301A tells mouse controller which direction the mouse is moving in. The output format is two channels quadrature (X and Y direction), which emulates encoder phototransistors. The DSP generates the x and y relative displacement values that are converted into two channel quadrature signals. The following diagrams show the timing for positive X motion, to the right or positive Y motion, up.
5.1 Quadrature Output Timing
X motion to the right Y motion up XA/YA
FOUR
XB/YB
83.3us
83.3us
83.3us
83.3us
XA/YA
THREE
XB/YB
83.3us
83.3us
166.7us
XA/YA
TWO
XB/YB
83.3us
250us
XA/YA
ONE
XB/YB
333.3us
333.3us @ 3000frames/second
Figure 6. Quadrature output timing
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5.2 Quadrature Output State Machine
The following state machine shows the states of the quadrature output pins. The three things to note are that state 0 is entered after a power on reset. While the PD pin is asserted, the state machine is halted. Once PD is de-asserted, the state machine picks up from where it left off. During times of mouse no movement will entry power saving mode, until mouse was moved.
PD POWER ON RESET STATE 0 (0,0)
O
N
N O TI EC N IR O D TI + EC IR -D
IR
EC
TI D TI + O N
EC
X/Y output STATE XA/YA XB/YB 0 PD 1 2 3 0 1 1 1 1 0 0 0
PD
STATE 1 (0,1)
-D
IR
STATE 3 (1,0)
IR
EC
TI -D
STATE 2 (1,1) PD
O + D IR EC TI O N
Figure 7. State machine
5.3 Quadrature Output Waveform
The following diagrams show the waveform of the two channel quadrature outputs. If the X, Y is motionless, the (XA, XB), (YA, YB) will keep in final state. Each state change (ex. STATE2 STATE3) is one count.
XA/YA X MOTION TO THE RIGHT Y MOTION UP ( + DIRECTION )
XB/YB STATE3 (1,0) STATE0 (0,0) STATE1 (0,1) STATE2 (1,1) STATE3 (1,0) STATE0 (0,0)
+1
+1
+1
N N O TI EC IR N O -D TI EC IR D +
+1
+1
MOTION COUNT
XA/YA
X MOTION TO THE LEFT Y MOTION DOWN ( - DIRECTION )
XB/YB STATE1 (0,1) STATE0 (0,0) STATE3 (1,0) STATE2 (1,1) STATE1 (0,1) STATE0 (0,0)
-1
-1
-1
-1
-1
MOTION COUNT
Figure 8. Quadrature output waveform
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6. Serial Interface
The synchronous serial port is used to set and read parameters in the PAN301A, and can be used to read out the motion information instead of the quadrature data pins. SCLK: The serial clock line. It is always generated by the host micro-controller. SDIO: The serial data line used for write and read data. PD: A third line is sometimes involved. PD(Power Down pin) is usually used to place the PAN301A in a low power mode to meet USB suspend specification. PD can also be used to force resynchronization between the micro-controller and the PAN301A in case of an error.
6.1 Transmission Protocol
The transmission protocol is a two-wire link, half duplex protocol between the micro-controller and PAN301A. All data changes on SDIO are initiated by the falling edge on SCLK. The host microcontroller always initiates communication; the PAN301A never initiates data transfers. The transmission protocol consists of the two operation modes: - Write Operation. - Read Operation. Both of the two operation modes consist of two bytes. The first byte contains the address (seven bits) and has a bit7 as its MSB to indicate data direction. The second byte contains the data.
FIRST BYTE R /W (1 BIT) ADDRESS (7 BIT) SECOND BYTE DATA (8 BIT)
MSB
LSB
MSB
LSB
Figure 9. Transmission protocol
6.1.1 Write Operation
A write operation, which means that data is going from the micro-controller to the PAN301A, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address (seven bits) and has a "1" as its MSB to indicate data direction. The second byte contains the data. The transfer is synchronized by SCLK. The micro-controller changes SDIO on falling edges of SCLK. The PAN301A reads SDIO on rising edges of SCLK.
SCLK SDIO
DON'T CARE
1 1
2 A6
3 A5
4 A4
5 A3
6 A2
7 A1
8 A0
9 D7
10 D6
11 D5
12 D4
13 D3
14 D2
15 D1
16 D0
DON'T CARE
SDIO driven by Micro-controller
Figure 10. Write operation
6.1.2 Read Operation
A read operation, which means that data is going from the PAN301A to the micro-controller, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address, is written by the micro-controller, and has a "0" as its MSB to indicate data direction. The second byte contains the data and is driven by the PAN301A. The transfer is synchronized by SCLK. SDIO is changed on falling 14 V1.3, MAY. 2004
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edges of SCLK and read on every rising edge of SCLK. The micro-controller must go to a high Z state after the last address data bit. The PAN301A will go to the high Z state after the last data bit.
SCLK SDIO
DON'T CARE
1 0
2 A6
3 A5
4 A4
5 A3
6 A2
7
8
Hi-z
9 D7
10 D6
11 D5
12 D4
13 D3
14 D2
15 D1
16 D0
Hi-z R/W bit of next address
A1 A0
SDIO driven by Micro-controller Note "A"
SDIO driven by PAN301A Note "B"
Note "A"
SCLK SDIO
1. Micro-controller send address to PAN301A. 2. Micro-controller release and set SDIO to Hi-Z after the last address bit. 7 A1 A0 tHOLD 3us,min 8 Hi-Z 9 D7
Note "B"
1. PAN301A send data to Micro-controller . 2. PAN301A release and set SDIO to Hi-Z after the last data bit. 16 Hi-Z D0
SCLK SDIO
1 R/W bit of next address SDIO driven by micro-controller
Figure 11. Read operation
6.2 Re-Synchronous Serial Interface
There are times when the SDIO line from the PAN301A should be in the Hi-Z state. If the microprocessor has completed a write to the PAN301A, the SDIO line is Hi-Z, since the SDIO pin is still configured as an input. However, if the last operation from the microprocessor was a read, the PAN301A will hold the D0 state on SDIO until a rising edge of SCLK. To place the SDIO pin into the Hi-Z state, first raise the PD line, and then toggle the SCLK line from high to low to high. The SDIO line will now be in the Hi-Z state. The PAN301A and the micro-controller might get out of synchronization due to following condition.
PD SCLK SDIO Hi-Z 1us,min
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
ADDRESS(R/W)
DATA
Figure 12. Forcing PAN301A SDIO line to the Hi-Z state
6.2.1 USB Suspend
Termination of a transmission by the micro-controller may sometimes be required (for example, due to a USB suspend interrupt during a read operation). To accomplish this the micro-controller should raise PD.
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The PAN301A will not write to any register and will reset the serial port (but nothing else) and be prepared for the beginning of future transmissions after PD goes low.
6.2.2 Firmware Flaws Error, or Others Error
The PAN301A and the micro-controller might get out of synchronization due to micro-controller firmware flaws. The PD pin can stay high, with the PAN301A in the shutdown state, or the PD pin can be lowered, returning the PAN301A to normal operation. If the microprocessor and the PAN301A get out of sync, then the data either written or read from the registers will be incorrect. In such a case, an easy way to solve this is to raise PD to re-sync the parts after an incorrect read. The PAN301A will reset the serial port but will not reset the registers and be prepared for the beginning of a new transmission.
6.2.3 Power On Problem
The problem occurs if the PAN301A powers up before the microprocessor sets the SCLK and SDIO lines to be output.
6.2.4 ESD Events
The PAN301A and the micro-controller might get out of synchronization due to ESD events. If the PAN301A and the micro-controller might get out of synchronization due to power on problem or ESD events. An easy way to solve this is to soft reset the PAN301A.
VDD PD SCLK SDIO Hi-Z
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1us,min
ADDRESS(R/W)
DATA
Figure 13. Soft reset the PAN301A (Reset full chip and SDIO line set to Hi-Z state)
6.3 Collision Detection on SDIO
The only time that the PAN301A drives the SDIO line is during a READ operation. To avoid data collisions, the micro-controller should release SDIO before the falling edge of SCLK after the last address bit. The PAN301A begins to drive SDIO after the next falling edge of SCLK. The PAN301A release SDIO of the rising SCLK edge after the last data bit. The micro-controller can begin driving SDIO any time after that. In order to maintain low power consumption in normal operation or when the PD pin is pulled high, the micro-controller should not leave SDIO floating until the next transmission (although that will not cause any communication difficulties).
6.4 Serial Interface Watchdog Timer Timeout
When there are only two pins to read register from PAN301A, and PD pin can't be used to resynchronous function. If the microprocessor and the PAN301A get out of sync, then the data either written or read from the registers will be incorrect. In such a case, an easy way to solve this condition is to toggle the SCLK line from high to low to high and wait at least tSIWTT to re-sync the parts after an incorrect read. The PAN301A will reset the serial port but will not reset the registers and be prepared for the beginning of a new transmission.
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tSIWTT SCLK tRESYNC 1us, min SDIO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
CMOS Optical Mouse Sensor
Hi-Z
ADDRESS(R/W) DATA
Figure 14. Re-synchronous serial interface using watchdog timer timeout
6.5 Power Down Mode
There are two different ways to entry power down mode, using the PD line or register setting.
6.5.1 PD Line Power Down Mode
To place the PAN301A in a low power mode to meet USB suspend specification, raise the PD line at least 700us. Then PD line can stay high, with the PAN301A in the shutdown state, or the PD pin can be lowered, returning the PAN301A to normal operation.
PD IDD tPD 500us
tPDW 700us,min
500us
90frames tPUPD 30.5ms
Figure 15. Power down minimum pulse width
PD SCLK SDIO
tPDW 700us,min
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
Hi-Z
ADDRESS(R/W)
DATA
Figure 16. PD line power down mode
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6.5.2 Register Power Down Mode
PAN301A can be placed in a power-down mode by setting bit 3 in the configuration register via a serial port write operation. After setting the configuration register, wait at least 1frame times. To get the chip out of the power-down mode, clear bit 3 in the configuration register via a serial port write operation. In power-down mode, the serial interface watchdog timer is not available. But, The serial interface still can read/write normally. For an accurate report after leave power down mode, wait about 3ms before the micro-controller is able to issue any write/read operation to the PAN301A. SCLK
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
Address=0x06
1 0 0 0 0 1 1 0 0 0
Data=0x08
0 0 1 0 0 0
1 frame, max
SDIO IDD
DATA
tPDR Figure 17. Power-down configuration register writing operation
6.6 Error Detection
1.The micro-controller can verify success of write operations by issuing a read command to the same address and comparing written data to read data. 2. The micro-controller can verify the synchronization of the serial port by periodically reading the product ID register.
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7. Referencing Application Circuit 7.1 Recommended Typical Application using Serial Interface
U1 U2
R1 D1 LED
3 1 2 VSS_LED LED OSCOUT OSCIN NC VSS VSS VDD VREFA VREFB PD SDIO SCLK NC NC NC XB XA YB YA 20 19 18 17 16 15 14 13 12 11 5 9 1 2 3 4 P0.0 P0.1 P0.2 P0.6 P0.5 P0.4 16 17 18
SW1 SW2 SW3
1 1 1
2 2 2
L M R
C1
VCC D+/SCLK D-/SDATA VREG VPP VSS P0.7 P1.0 XTALIN P1.1 XTALOUT 11 13 12 8 7 6 15 14 10 1 2
C2
+
P0.3
X1
18.432MHz
0.1uF
10uF
VCC_5V D+/SCLK D-/SDATA
JP1
1 2 3 4
4 5 6 7 8 9 10
R2
1.3K
GND
HEADER 4
ENSW1
Z2 Z1 COM 3
ENCODER
+
C3
C5
+
C4
C6
10uF 0.1uF 1uF
0.1uF
PAN301ASI-20X
CY7C63723-PC
Figure 18. Application circuit using serial interface with PAN301ASI-20X
Figure 19. Example printed circuit board layout. (PAN301ASI-20X V.S CY7C63723-PC)
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PixArt Imaging Inc. PAN301A CMOS Optical Mouse Sensor
7.2 Application Circuit using Quadrature Output Pins
U1
R1 D1
2 1 VSS_LED LED OSCOUT OSCIN NC VSS VSS VDD VREFA VREFB PD SDIO SCLK NC NC NC XB XA YB YA 20 19 18 PD 5 P1.0
U2
P0.6 P0.5 P0.4 16 17 18
SW11 SW21 SW31 C1
2 2 2
L M R C2
LED
3
4 5 6 7 8 9 10
17 16 15 14 13 12 11 XB XA YB YA 1 2 3 4 9 VCC D+/SCLK D-/SDATA P0.0 P0.1 P0.2 P0.3 XTALIN VREG VPP VSS P0.7 P1.1 XTALOUT 11 13 12 8 7 6
0.1uF
R2
1.3K
ENSW1
15 14 10 1 2 Z2 Z1 COM 3
+
C3
C5
+
C4
C6 0.1uF
ENCODER
10uF 0.1uF 1uF
PAN301ASI-20X
CY7C63723-PC
Figure 20. Application circuit using quadrature output with PAN301ASI-20X
Figure 21. Example printed circuit board layout. (PAN301ASI-20X V.S CY7C63723-PC)
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PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.3, MAY. 2004
+
X1
18.432MHz
10uF VCC_5V D+/SCLK D-/SDATA GND
JP1
1 2 3 4
HEADER 4
20
PixArt Imaging Inc. PAN301A CMOS Optical Mouse Sensor
7.3 Typical Application for PS/2 Interface
U1
R1
1
D1
2
VSS_LED LED OSCOUT OSCIN NC VSS VSS VDD VREFA VREFB
PD SDIO SCLK NC NC NC XB XA YB YA
20 19 18 17 16 15 14 13 12 11 2 7 12 13 14 15 16 L M OSC.OUT OPT X1 X2 Y1 Y2 OSCR VDD CLK DATA Z2 Z1 VSS 1 5 6 R 11 10 9
LED
3
U2
SW11 SW21 SW31 C2 0.1uF
+ 2 2 2
X1
18.432MHz
L M R
4 5 6 7 8 9 10
C1 10uF JP1 VCC_5V CLK DATA ENSW1 GND
3 1 2 Z2 Z1 1 2 3 4
4 3 8
COM
+
C3
C5
+
C4
C6 0.1uF
HEADER 4
10uF 0.1uF 1uF
PAN301ASI-20X
R2 51K
ENCODER
EM84510FP
Figure 22. Application circuit using quadrature output with PAN301ASI-20X
Figure 23. Example printed circuit board layout. (PAN301ASI-20X V.S EM84510FP)
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21 V1.3, MAY. 2004
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PixArt Imaging Inc. PAN301A CMOS Optical Mouse Sensor
7.4 PCB Layout Consideration
1. Caps for pins 8, 9, 10 MUST have trace lengths LESS than 5mm. 2. The trace lengths of OSCOUT, OSCIN must less than 6mm.
7.5 Recommended Value for R1
Radiometric intensity of LED Bin limits (mW/Sr at 20mA) LED Bin grade Min. N P Q 14.7 17.7 21.2
Typ.
Max. 17.7 21.2 25.4
Note: Tolerance for each bin will be 15% R1 value (ohm), VDD=5.0V LED bin grade Min. N P Q 51 51 51
Typ. 100 100 100
Max.
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22 V1.3, MAY. 2004
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PixArt Imaging Inc. PAN301A CMOS Optical Mouse Sensor
8. Package Information 8.1 Package Outline Drawing
20 19 18 17 16 15 14 13 12 11
1
2
3
4
5
6
7
8
9
10
19.30 0.760
3.20 0.126
9.98 0.393
1.02 0.040
5.08 0.200 1.46 0.0575 0.254 0.010
0.457 0.018
1.778 0.070
5 - 12 14.22 0.560
13.589 0.535 11.938 0.470 1 2 3 4 5 6 7 8
5.715 0.225 4.064 0.160 9 10
5.080 0.200
4.55 0.179 20 19 18 17 16 15 14 13 12 11 0.800 0.031
NOTES: 1. All dimensions in MM/INCH. 2. All dimensions tolerance: +/- 0.10mm 3. Maxmumflash: +0.2mm
5.56 0.2189
Figure 24. Package outline drawing
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PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
PixArt Imaging Inc. PAN301A CMOS Optical Mouse Sensor
8.2 Recommended PCB Mechanical Cutouts and Spacing
4.064 0.160 2.286 0.090 6.985 0.275 4.445 0.175 1.194 0.047 10.998 0.433 0 ref. 27.153 1.069
16.942 0.667
26.010 1.024
7.544 0.297
0.711 0.028 Optical Center
0 ref.
1.194 0.047 4.445 0.175 6.985 0.275 0.711 0.028
3.251 0.128
7.544 0.297
All Dimensions : mm / inch
Figure 25. Recommended PCB mechanical cutouts and spacing
9. Update History
Version V1.0 V1.1 V1.2 V1.3 Update Creation, Preliminary 1st version 3.2 Register Descriptions 4. Specifications - Recommend Operating Condition Figure5. 2D assembly 4. Specifications - DC Electrical Characteristics 3.2 Register Descriptions 3. Registers and Operation 4. Specifications - AC Operating Condition Date 10/27/2003 01/12/2004 01/14/2004 05/06/2004
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24 V1.3, MAY. 2004
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